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Course Name | |
Code | Semester | Theory (hour/week) | Application/Lab (hour/week) | Local Credits | ECTS |
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Spring |
Prerequisites |
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Course Language | ||||||||||||
Course Type | Required | |||||||||||
Course Level | - | |||||||||||
Mode of Delivery | - | |||||||||||
Teaching Methods and Techniques of the Course | ||||||||||||
Course Coordinator | ||||||||||||
Course Lecturer(s) | ||||||||||||
Assistant(s) | - |
Course Objectives | |
Learning Outcomes | The students who succeeded in this course;
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Course Description |
| Core Courses | X |
Major Area Courses | ||
Supportive Courses | ||
Media and Managment Skills Courses | ||
Transferable Skill Courses |
Week | Subjects | Required Materials |
1 | Logic Functions, Gates and Metrics | Ch. 16-Preview |
2 | Review MOS Transistor Theory; NMOS Inverter with Resistor Load | Ch. 16.1 |
3 | NMOS Interter with Saturated Load; NMOS Interter with Depletion Load | Ch. 16.1 |
4 | NMOS Logic Gates | Ch. 16.2 |
5 | CMOS Inverter | Ch. 16.3 |
6 | CMOS Logic Gates-Clocked CMOS; Transmission Gates | Ch. 16.4-16.5-16.6 |
7 | Sequential Logic Gates; Memories | Ch 16-7-16.8 |
8 | RAM Memory Cells; ROM Memory | Ch 16.9-16.10 |
9 | Digital to Analog Converters (DAC); Analog to Digital Converters (ADC) | Ch. 16.11 |
10 | Diode Transistor Logic (DTL) Gates: Emitter Coupled Logic (ECL) | Ch. 17.1-17.2 |
11 | Transistor Transistor Logic (TTL) Gates | Ch. 17.3 |
12 | Schottky TTL and BiCMOS Digital Circuits; Schmitt Trigger Circuits | Ch. 17.4-17.5 |
13 | Astable and Monostable Multivibrators; 555 Timer Circuit | Ch. 15.4-15.5 |
14 | Voltage Regulators; Oscillators | Ch 15.6-15.2 |
15 | Review | |
16 | Final |
Course Notes/Textbooks | Donald A. Neamen, Microelectronics-Circuit Analysis and Design, 3. Edition, McGraw Hill, 2007 |
Suggested Readings/Materials | (1) S. Sedra and K. C. Smith, Microelectronic Circuits – Circuit Analysis and Design, Oxford Press, 2009. (2) T.A.Demassa, Z. Ciccone, Digital Integrated Circuits, John Wiley & Sons, 1996. |
Semester Activities | Number | Weigthing |
Participation | 16 | |
Laboratory / Application | 16 | 25 |
Field Work | ||
Quizzes / Studio Critiques | 2 | 5 |
Portfolio | ||
Homework / Assignments | 10 | 5 |
Presentation / Jury | ||
Project | ||
Seminar / Workshop | ||
Oral Exam | ||
Midterm | 2 | 40 |
Final Exam | 1 | 25 |
Total |
Weighting of Semester Activities on the Final Grade | 75 | |
Weighting of End-of-Semester Activities on the Final Grade | 25 | |
Total |
Semester Activities | Number | Duration (Hours) | Workload |
---|---|---|---|
Course Hours (Including exam week: 16 x total hours) | 16 | 4 | 64 |
Laboratory / Application Hours (Including exam week: 16 x total hours) | 16 | 2 | |
Study Hours Out of Class | 16 | 3.5 | |
Field Work | |||
Quizzes / Studio Critiques | |||
Portfolio | |||
Homework / Assignments | 10 | 2 | |
Presentation / Jury | |||
Project | 10 | ||
Seminar / Workshop | |||
Oral Exam | |||
Midterms | 2 | 5 | |
Final Exams | 1 | 10 | |
Total | 192 |
# | Program Competencies/Outcomes | * Contribution Level | ||||
1 | 2 | 3 | 4 | 5 | ||
1 | Have sufficient background in mathematics, basic sciences and other related engineering areas and to be able to use this background in the problems of the electrical and electronics engineering. | X | ||||
2 | Be able to identify, formulate and solve electrical and electronics engineering-related problems by using state-of-the-art methods, techniques and equipment. | X | ||||
3 | Be able to analyze an electrical and electronics system, system components or process, and to design with realistic limitations to meet the requirements using modern design techniques. | X | ||||
4 | Be able to choose and use the required techniques and tools for electrical and electronics engineering applications; to use technical symbols and drawings for communication. | X | ||||
5 | Be able to design and do simulation and/or experiment, collect and analyze data and interpret the results. | X | ||||
6 | Be able to work independently and participate in multidisiplinary teams. | X | ||||
7 | Be conscious of project management, office applications, workers’ health, environment and work safety; awareness of professional and ethical responsibilities and the legal consequences of engineering applications. | X | ||||
8 | Be able to access information, to do research and use data bases and other information sources. | X | ||||
9 | Be able to communicate both in oral and written form in English at a minimum level of European Language Portfolio Global Scale Level B1. | |||||
10 | Have an aptitude, capability and inclination for life-long learning. | X | ||||
11 | To be able to use a second foreign language at intermediate level. |
*1 Lowest, 2 Low, 3 Average, 4 High, 5 Highest